The development of polymeric dielectric materials has been fundamental for the progress of both traditional and organic electronic devices. In particular, emerging display and labeling technologies based on organic thin-film transistors (OTFTs), such as electronic paper and radiofrequency identification (RFID) cards, require fabrication of OTFTs on flexible plastic substrates over very large areas and via high throughput processes. Therefore, there has been considerable effort in developing new materials for OTFT components (semiconductor, dielectric, and contacts) that can be deposited via solution-processing methods such as spin-coating, casting, and printing.
Many organic semiconductors are readily deposited from solution either directly or as molecular/polymeric soluble precursors which are then converted into the insoluble form. Doped conjugated polymers and nanoparticle-based conductive inks allow solution fabrication of sufficiently low resistivity lines for source/drain and gate contact applications.
Although various polymers have been employed as dielectrics for OTFTs, two major limitations with current-generation polymeric dielectric-based OTFTs exist. First, OTFTs function at relatively large operating voltages due to the intrinsically low (compared to crystalline semiconductors) semiconductor charge carrier mobilities. Second, because very few polymeric dielectric materials can perform optimally with a wide range of both hole-transporting (p-type) and electron-transporting (n-type) organic semiconductors, there has been limited complementary circuit application. These problems are exacerbated when printed dielectric/circuits are fabricated.
In a typical organic field effect transistor (OFET), the conductance of the source-drain channel region is modulated by the source-gate electric field (EG). When the device is in the off-state (EG=0), the channel conductance is very low (typically >1012Ω). When the device is in the on-state (EG≠0), a sharp increase in conductance is observed (<106Ω), and the output current flow (in saturation) between the source and the drain (IDS) is defined by:
                              I          DS                =                              W                          2              ⁢              L                                ⁢          μ          ⁢                                          ⁢                                                    C                i                            ⁡                              [                                                      V                    G                                    -                                      V                    T                                                  ]                                      2                                              (                  Eq          .                                          ⁢          1                )            where W is the width of the channel, L is the length of the channel, μ is the semiconductor charge carrier mobility, Ci is the dielectric capacitance per unit area, VG is the source-gate voltage, and VT is the threshold voltage. It can be seen that for a given device geometry and semiconductor, equivalent current gains (IDS) can be achieved at lower operating biases by increasing Ci.
Because
                                          C            i                    =                                    ɛ              0                        ⁢                          k              d                                      ,                            (                  Eq          .                                          ⁢          2                )            where k is the dielectric constant, ∈0 is the vacuum permittivity, and d is the thickness of the dielectric material, Ci is increased when k increases and/or d decreases. However, k of most insulating polymers is low (˜3-6). Additionally, most insulating polymers need to be quite thick (usually ˜1 μm) to avoid considerable current leakage through the gate electrode.
To reduce current leakage for thinner films, polymeric dielectrics such as crosslinked melamine/Cr6+ salts-polyvinylphenol (PVP) and crosslinked benzocyclobutene (BCB) have been introduced. However, these polymer films require high annealing temperatures and Ci values are typically <<20 nF cm−2.
Furthermore, the choice of dielectric material can affect μ, which is an important device parameter. In particular, the gate dielectric permits the creation of the gate field and the establishment of the two-dimensional channel charge sheet. Upon application of a source-drain bias, the accumulated charges move very close to the dielectric-semiconductor interface from the source electrode to the drain electrode. Therefore, the nature of the dielectric-semiconductor interface, more particularly, the dielectric surface morphology prior to the deposition of the semiconductor material, can greatly affect how these charges move within the semiconductor, i.e., the carrier mobility. Moreover, the surface morphology of the dielectric material and variations in its surface energies (e.g., surface treatment via self-assembled monolayers) have been shown to modify the growth, morphology, and microstructure of the vapor/solution-deposited semiconductor, each of these being a factor affecting μ and Ion:Ioff, the latter being the drain-source current ratio between the “on” and “off” states, another important device parameter. The properties of the dielectric material can also affect the density of state distribution for both amorphous and single-crystal semiconductors.
It is also desirable to have dielectric materials that adhere well to diverse substrates, i.e., the dielectric materials do not delaminate easily, to ensure device integrity under operating conditions, and to have dielectric materials that are hydrophobic such that device performance is not affected by humidity.
Accordingly, there is a desire in the art for polymeric dielectric materials that can exhibit relatively high capacitance and low current leakage, that can be prepared from commercially available polymer/molecular precursors via solution processes at low temperatures and atmospheric pressures, that can be compatible with diverse gate materials and semiconductors, that can adhere well to various substrates, and that can be resistant to the absorption of ambient moisture.